operand specifier oor Spaans
operand specifier
Vertalings in die woordeboek Engels - Spaans
sílaba de llamada de operando
Geskatte vertalings
Vertoon algoritmies gegenereerde vertalings
voorbeelde
Advanced filtering
Voorbeelde moet herlaai word.
This takes the form of an instruction (vsetcfg) with four immediate operands, specifying the number of vector registers of each available width needed.
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There are instruction sets with nearly uniform fields for opcode and operand specifiers, as well as others (the x86 architecture for instance) with a more complicated, variable-length structure.
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The DEC VAX allowed multiple memory operands for almost all instructions, and so reserved the first few bits of each operand specifier to indicate the addressing mode for that particular operand.
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Immediate Mode In the immediate mode, the operand is specified in the instruction itself.
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Remember that an operand is specified by either a Q field or a V field at any time.
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In this mode, the operand is specified implicitly in the definition of the opcode.
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If STOS is used, a destination operand must be specified.
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MOVS requires both operands to be specified.
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If LODS is used, the memory operand must be specified.
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Exactly 256 different combinations of operands can be specified by the Mod R/M byte.
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SCAS requires the operands to be specified.
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They first count up to the first operand, 2, then move forward by as many steps as specified by the second operand, 4.
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If neither is specified, the memory operand is assumed to be in real-number format.
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Each kind of combined fragment has a specified configuration of operands.
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Then, remove the substring specified by the right operand.
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Those operands may be specified as a constant value (called an immediate value), or as the location of a value that may be a processor register or a memory address, as determined by some addressing mode.
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INDEX can be used to add or subtract an index value to the base address specified by the operand of the instruction that follows INDEX.
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These tags specify the type of the operand, and the operation is chosen accordingly.
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The discussion of each operator specifies whether it expects lvalue operands and whether it yields an lvalue.
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C++ does not specify the order in which the operands of most operators (including +) are to be evaluated.
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C, like most languages, does not specify the order in which the operands of an operator are evaluated.
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Most instructions have the symbolic form "OP X,Y,Z", where OP specifies the sort of instruction, X specifies the register used to store the result of the instruction and the rest specify the operands of the instruction.
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The non-strict stack model also allows binary operations to use ST(0) together with a direct memory operand or with an explicitly specified stack register, ST(x), in a role similar to a traditional accumulator (a combined destination and left operand).
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The operand field contains the actual operand to be used in conjunction with the operation specified in the instruction.
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1-operand (one-address machines), so called accumulator machines, include early computers and many small microcontrollers: most instructions specify a single right operand (that is, constant, a register, or a memory location), with the implicit accumulator as the left operand (and the destination if there is one): load a, add b, store c.
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