Teken aan
Besonderhede van voorbeeld: 2016325060709344812
terug
Metadata
Author:
ParaCrawl Corpus
Data
German
[de]
SystemVerilog – Innovative Verifikation für FPGA Design
English
[en]
SystemVerilog – Advanced Verification for FPGA Design
History
Your action:
Comment
Mark incorrect example
Please enable JavaScript.